Q&A- Assembler & TLB

QA1 About TLB.
QA2 How do I use the assembler?
QA3 How do I use the reverse assembler tool "gdis," for SGI?
QA4 Is the assembler compatible with 64-bit registers?
QA5 nop is entered after a branch command in the assembler...
QA6 Is there any documentation for the assembler?


Q1 About TLB

A1 At present, we do not handle any systems that utilize TLB. We also don't have any reports about systems using TLB in related development groups. Unfortunately, we cannot provide information about TLB at this time.

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Q2 How do I use the assembler?

A2 First of all, please be aware that Nintendo does not support programming with the assembler. The answer to this question will be based on this fact. Since we currently don't have an assembler programming guidebook for the R4300, we are using NEC's guide for the R4300. Create an assembler code, save it with the extension *.s, then assemble it using the c compiler. The procedure is the same as when compiling a *.c file. For example, "when the assembler code called "prog.s" has been created, it can be assembled by entering if cc prog.s in the command line.

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Q3 How do I use the reverse assembler tool "gdis" for SGI?

A3 It is basically the same as the "dis" reverse assembler.

Enter gdis "wave filename" to display the code when the wave file is executed. With dis, the code was displayed when the segment file was executed, but could not be used with wave file code. With gdis the code can now be displayed when the wave file is executed. Details about gdis can be found in the Tools section of the Function Reference.

----------------------------------------------------
%gdis -S codesegment.o /*Output reverse assembly data for sourced 
                  code*/
----------------------------------------------------

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Q4 Is the assembler compatible with 64-bit registers?

A4 It is not currently compatible with 64-bit registers. Divide the register into 32-bit segments.

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Q5 When the following kind of source code is assembled with the IRIX5.3 assembler (as), nop is always entered after a branch command, but does not appear in the branch delay slot in the following commands.

<Source>

bnel a0, zero, branch1 
srl a2, a1, 1

<Assembly Result>

bnel a0, zero, branch1
nop
srl a2, a1, 1

A5 nop does not need to be entered as long as the assembler pseudo-command

.set    noreorder

is present.

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Q6 Is there any documentation for the assembler?

A6 MIPSpro Assembly Language Programmers's Guide (English) is provided on the IDO with IRIS Insight as assembler documentation for IRIX.

In Japanese, (while it is actually an architecture book, rather than an assembler book - and it is a little old) you can refer to the Appendix of "mips RISC Architecture -R2000/R3000-" (published by Tomotachi).

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