2-2 CPU

The N64 CPU is a very high-speed CPU with a clock speed of 93.75 MHz. Because an integer pipeline and a floating-point pipeline are shared, integer arithmetic and floating-point arithmetic are not processed simultaneously. However, floating-point arithmetic can be executed by the hardware.

Figure 2-2-1 The N64 Hardware Block (CPU)

2-2-1 CPU Features

• Belongs to the R4000 family of processors
• Is more than 100 times the speed of NES
• Provides an execution unit that equips the 64-bit register file for integer or floating-point arithmetic.
• Provides a 16K-byte instruction cache on the CPU chip.
• Provides a data cache that uses an 8K-byte write-back system on the CPU chip.
• Provides a memory management unit that uses the high-speed Translation Lookaside Buffer (TLB) to convert virtual addresses to physical addresses.

*TLB : Translation Lookaside Buffer

• This is a register for mapping virtual addresses to physical addresses.
• The TLB has 32 entries. Each entry maps a virtual address onto the page of two physical addresses.
• Page addresses are variable (4kbyte,16kbyte,64kbyte,256kbyte,1MByte,4MByte, or 16MByte) and can be set independently in each entry.

2-2-2 CPU Specifications

Item	Specification
system clock	:93.75MHz
bus width	:64bit
instruction cache	:16kbyte
data cache	:8kbyte