Invalidates CPU data cache lines
#include <ultra64.h> /* os.h */
void osInvalDCache(void *vaddr, s32 nbytes);
The MIPS R4300 CPU implements an 8 Kbyte direct-mapped data cache with a line size of 16 bytes. The cache is not synchronized with physical memory and thus cache lines must be invalidated to ensure that old data is not used when more recent data exists in physical memory.
osInvalDCache function invalidates all data cache lines that contain the region of [vaddr, vaddr+nbytes- 1]. The given address vaddr must be a CPU virtual address, either direct mapped or mapped via the CPU TLB. If vaddr is not aligned to the cache line boundary, and nbytes is not a multiple of the cache line size, a slightly larger region may be invalidated.
This function is mostly used when data is read from mask ROM to memory by way of DMA. In this case, the cache data is out of date with respect to physical memory, and thus cache lines associated with the memory read by way of DMA must be invalidated prior to accessing these data.
osInvalDCache function does the following operations:
If nbytes < 8192: writes back data cache lines with the region of [vaddr, vaddr+nbytes-
1] and invalidates them.
If nbytes >= 8192: writes back all data cache lines and invalidates them.
osMapTLB, osInvalICache, osWritebackDCache
04/30/1999 Changed Format.
11/05/1999 Retranslated "Description." Added "Additional Description."