The N64 CPU uses a number of exception types. Most share a common vector, where the operating system receives them, reads the CAUSE register, and determines which of the 16 normal causes occurred. With the exception of the Interrupt cause (which may occur externally), all exceptions are internally generated within the CPU. For example, an attempt to fetch a word from an invalid address will generate an address error exception.
The operating system has exception handlers for Coprocessor Unusable, Breakpoint, and Interrupt exceptions. All other exceptions are considered to be faults and are passed to the fault handler. The fault handler stops the faulted thread, sends a message to any threads (i.e., rmon) registered for the OS_EVENT_FAULT event, and dispatches the next runnable thread from the system run queue. If the debugger is present, a message is sent from the target to the host and the debugger (according to the request) can show you exactly where the fault occurred. Breakpoint exceptions are also handled in this way. The debugger will stop all user threads in the event of a breakpoint or a fault.
When an interrupt occurs, the CAUSE register is examined to see which interrupt caused the exception. N64 CPU supports eight interrupts described in the table below.
|Software generated interrupt 1
|Software generated interrupt 2
|RCP interrupt asserted
|A peripheral has generated an interrupt
|User has pushed reset button on console
|Indy has read the value in the RDB port
|Indy has written a value to the RDB port
|Internal counter has reached its terminal count
If the RCP interrupts N64 CPU, then an RCP register is read to see which of the RCP interrupts is being asserted. Thus, processing RCP interrupts is a two stage process - first the cause of the CPU interrupt is determined, then the cause of the RCP interrupt is isolated.
Normally, the Nintendo 64 game threads run with all interrupts enabled. It is possible to change the interrupt masks of the N64 CPU and RCP via a system call. Clearly, this must be used with great caution, as disabling a critical interrupt can cause the system to lock up or prevent real time response.