12.8 MI - Memory Interface

Memory Interface (MI) simply interfaces to the framebuffer memory. It has programmable color and Z buffer pointers, a 32-bit fill color value used in the FILL cycle type (see Section 12.1.4, "Fill Mode", and an enable for color dither).

Figure 12-14 Memory Interface State and Input/Output
[Figure 12-14]


12.8.1 Image Location and Format

The framebuffer is row-ordered, starting at the upper left. The color and Z buffer image pointers must be 64-bit aligned. The DRAM has dual banks, one on each 1 MB. By keeping the color and Z buffers on different banks, you can improve the DRAM access latency when the RDP is seeking DRAM bandwidth for rendering.

The Nintendo 64 system actually uses 9-bit DRAMs rather than 8-bit DRAMs, to gain two extra bits per color or z pixel. The color and z image pixel format are illustrated in Figure 12-15.

Figure 12-15 Pixel Format of Color and Z buffer Image
[Figure 12-15]


12.8.2 Fill Color

The MI has a 32-bit fill color register that is used in FILL cycle type. Fill color is typically programmed to a constant value to fill background color and Z buffers. Since two framebuffer pixels are 18x2=36 bits, while fill color register is 32 bits, a few of the bits are replicated. In Figure 12-16 this bit replication is illustrated.

Figure 12-16 Fill Color Register LSB Replication
[Figure 12-16]
Table 12-30 gsSetFillColor(data32bits)
data32bits2 different macros, one each for color and z.
each generate 16 bits. so do x <<16 | x to get 32 bits
GPACK_RGBA5551(r, g, b, a), a=1 is full coverage. (Typical)
GPACK_ZDZ(z, dz), z=G_MAXFBZ, dz=0. (Typical)


12.8.3 Dithering

The RDP pipeline keeps full, 8-bit per RGB component precision throughout. Dithering can be enabled or disabled to write to the 5-bit per RGB component dram framebuffer format. Dithering is recommended since it can significantly reduce Mach banding effect.